module dec68c title 'interrupt controller for 68k computer' dec68c device 'P22V10'; clk pin 1; as pin 2; fc2 pin 3; fc1 pin 4; fc0 pin 5; int1 pin 6; int2 pin 7; int3 pin 8; int4 pin 9; int5 pin 10; int6 pin 11; int7 pin 13; intdis pin 14; pbrst pin 15; ipl2 pin 23 istype 'reg'; ipl1 pin 22 istype 'reg'; ipl0 pin 21 istype 'reg'; vpa pin 20 istype 'com'; halt pin 19 istype 'com'; reset pin 18 istype 'com'; fc = [ fc2, fc1, fc0 ]; ipl = [ !ipl2, !ipl1, !ipl0 ]; H,L,X,C = 1,0,.X.,.c.; equations " open-collector simulated by tri-state output !halt = 1; halt.oe = !pbrst; !reset = 1; reset.oe = !pbrst; !vpa = 1; vpa.oe = !as & (fc == 7); ipl.c = clk; ipl.oe = [ 1, 1, 1 ]; truth_table ( [ !int1, !int2, !int3, !int4, !int5, !int6, !int7, !intdis ]:> ipl ) [ X, X, X, X, X, X, X, 1 ]:> 0; [ X, X, X, X, X, X, 1, 0 ]:> 7; [ X, X, X, X, X, 1, 0, 0 ]:> 6; [ X, X, X, X, 1, 0, 0, 0 ]:> 5; [ X, X, X, 1, 0, 0, 0, 0 ]:> 4; [ X, X, 1, 0, 0, 0, 0, 0 ]:> 3; [ X, 1, 0, 0, 0, 0, 0, 0 ]:> 2; [ 1, 0, 0, 0, 0, 0, 0, 0 ]:> 1; [ 0, 0, 0, 0, 0, 0, 0, 0 ]:> 0; test_vectors( [ clk, int1, int2, int3, int4, int5, int6, int7, intdis ]->[ ipl2, ipl1, ipl0 ] ) [ C, X, X, X, X, X, X, 0, 1 ]->[ 0, 0, 0 ]; [ C, X, X, X, X, X, 0, 1, 1 ]->[ 0, 0, 1 ]; [ C, X, X, X, X, 0, 1, 1, 1 ]->[ 0, 1, 0 ]; [ C, X, X, X, 0, 1, 1, 1, 1 ]->[ 0, 1, 1 ]; [ C, X, X, 0, 1, 1, 1, 1, 1 ]->[ 1, 0, 0 ]; [ C, X, 0, 1, 1, 1, 1, 1, 1 ]->[ 1, 0, 1 ]; [ C, 0, 1, 1, 1, 1, 1, 1, 1 ]->[ 1, 1, 0 ]; [ C, 1, 1, 1, 1, 1, 1, 1, 1 ]->[ 1, 1, 1 ]; [ C, 0, 1, 0, 1, 0, 0, 0, 1 ]->[ 0, 0, 0 ]; [ C, 1, 1, 1, 0, 0, 0, 1, 1 ]->[ 0, 0, 1 ]; [ C, 0, 0, 1, 1, 0, 1, 1, 1 ]->[ 0, 1, 0 ]; [ C, 1, 0, 0, 0, 1, 1, 1, 1 ]->[ 0, 1, 1 ]; [ C, 0, 1, 0, 1, 1, 1, 1, 1 ]->[ 1, 0, 0 ]; [ C, 0, 0, 1, 1, 1, 1, 1, 1 ]->[ 1, 0, 1 ]; [ C, 0, 1, 1, 1, 1, 1, 1, 1 ]->[ 1, 1, 0 ]; [ C, 1, 1, 1, 1, 1, 1, 1, 1 ]->[ 1, 1, 1 ]; [ C, X, X, X, X, X, X, X, 0 ]->[ 1, 1, 1 ]; test_vectors( [ as, fc2, fc1, fc0 ]->[ vpa.oe ] ) [ 1, X, X, X ]->[ 0 ]; [ 0, 0, 0, 0 ]->[ 0 ]; [ 0, 0, 0, 1 ]->[ 0 ]; [ 0, 0, 1, 0 ]->[ 0 ]; [ 0, 0, 1, 1 ]->[ 0 ]; [ 0, 1, 0, 0 ]->[ 0 ]; [ 0, 1, 0, 1 ]->[ 0 ]; [ 0, 1, 1, 0 ]->[ 0 ]; [ 0, 1, 1, 1 ]->[ 1 ]; test_vectors( [ pbrst ]->[ reset.oe, halt.oe ] ) [ 1 ]->[ 0, 0 ]; [ 0 ]->[ 1, 1 ]; end dec68c